1. Field of the Invention
The present invention relates to a horizontal electron-beam deflector, an automatic frequency controller (AFC), and a video signal receiver.
2. Description of the Related Art
First, the configuration of a general color television receiver will be explained.
FIG. 12 is a view of the configuration of a general color television receiver.
As shown in FIG. 12, a color television receiver comprises an antenna 2, a station selector 3, a video signal receiver 4, an audio signal receiver 5, a speaker 6, a synchronization signal deflector 7, a color signal reproducing portion 8, and a color video display tube 9.
In such a color television receiver, a signal of a desired channel is selected by the station selector 3 among television signals received by the antenna 2, and an intermediate frequency (IF) signal S3 is generated from the signal.
The intermediate frequency signal S3 is amplified by an IF amplifier 41 in the video signal receiver 4 and divided into an audio intermediate frequency (IF) signal S4a and a video intermediate frequency (IF) signal S4b. The audio IF signal S4a applied to the audio signal receiver 5 is detected therein and a television audio signal is extracted. Audio in accordance with the television audio signal is output from the speaker 6.
In the video signal receiver 4, the video IF signal S4b is detected at a detector 42 and a complex video signal S4c is extracted. The complex video signal S4c is amplified by an amplifier 43 and output to the synchronization signal deflector 7 and the color signal reproducing portion 8 as a complex video signal S4d. Also, the complex video signal S4c is output to the color signal reproducing portion 8 as a luminance signal S4e via a trap circuit and a delay circuit.
In the color signal reproducing portion 8, a color signal is extracted from the complex video signal S4d and the luminance signal S4e, and three primary colors R (red), G (green), and B (blue) are generated and output to the color video display tube 9.
The synchronization signal deflector 7, as shown in FIG. 13, comprises a synchronization circuit 7a, a vertical deflection circuit 7b, and a horizontal deflection circuit 7c. In the synchronization circuit 7a, a vertical synchronization signal S7a1 and a horizontal synchronization signal S7a2 are extracted from the complex video signal S4d and output respectively to the vertical deflection circuit 7b and the horizontal deflection circuit 7c.
In the vertical deflection circuit 7b, a vertical deflection signal S7a is generated and output to a vertical deflection coil 9b. As a result, in the color video display tube 9, an electron beam emitted from a cathode is deflected in the vertical direction before reaching a fluorescent surface of the color video display tube 9 due to a magnetic field by the vertical deflection coil 9b.
In the horizontal deflection circuit 7c, a horizontal deflection signal S7b is generated and output to a horizontal deflection coil 9a. As a result, in the color video display tube 9, an electron beam emitted from a cathode is deflected in the horizontal direction due to the magnetic field by the horizontal deflection coil 9a.
There is known a color television receiver with a multiscanning function capable of receiving and displaying a television signal having a synchronization signal of a predetermined frequency range of, for example, 31 kHz to 60 kHz.
A synchronization signal deflector in such a color television receiver with such a multiscanning function has to detect the frequency of a synchronization signal included in the received television signal and control internal electronic circuits based on the results of the detection. The configuration of the synchronization signal deflector differs between a color television receiver with a multi scanning function and another without the function.
FIG. 14 is a view of the configuration of a horizontal deflecting circuit 7c of a color television receiver with a multiscanning function of the related art.
As shown in FIG. 14, the horizontal deflection circuit 7c comprises a computer 10, an AFC circuit 11, and a deflection circuit 12.
The computer 10 detects a frequency of the input horizontal synchronization signal S7a2 and outputs independent control signals S10a and S10b indicating the detected frequency to the deflection circuit 12 and the AFC circuit 11 respectively. In the computer 10, the control signal S10a and the control signal S10b are synchronized for output.
Here, each bit of the control signal S10a is used to respectively control the on/off operation of a corresponding switch built in the deflection circuit 12 due to the characteristics of the circuit configuration of the deflection circuit 12, which will be explained below. Namely, the control signal S10a is not decoded in the deflection circuit 12.
The control signal S10b is output to the AFC circuit 11 via a serial bus which is connected to a plurality of circuits, such as a control circuit for adjusting the brightness of a display, color tone, contour of image, and so fourth. Therefore, the control signal S10b, in addition to a frequency of the horizontal synchronization signal S7a2, includes data and the like: to specify a circuit for outputting the control signal S10b. The control signal S10b is decoded in the AFC circuit 11 for use.
FIG. 15 is a view of the configuration of the AFC circuit 11.
As shown in FIG. 15, the AFC circuit 11 comprises a register 21, a current source 22, an oscillation circuit 23, and a wiring group 24.
The register 21 is, for example, an 8-bit register which receives as input from the computer 10 an 8-bit control signal 10b indicating a frequency and stores bit data f.sub.0 to f.sub.7. The register 21 outputs the stored control signal S10b as a control signal S21 via the 8-bit wiring group 24 to the current source 22. Here, the wiring group 24 connects the 8-bit register with switches 26a to 26h, respectively.
The current source 22 comprises constant current sources 25a to 25h and the switches 26a to 26h.
The constant current sources 25a, 25b, 25c, 25d, 25e, 25f, 25g, and 25h respectively output constant currents I, 2I, 4I, 8I, 16I, 32I, 64I, and 128I, where I indicates a unit current. One ends of the switches 26a, 26b, 26c, 26d, 26e, 26f, 26g, and 26h are connected to the oscillation circuit 23 and the other ends are respectively connected to the constant current sources 25a, 25b, 25c, 25d, 25e, 25f, 25g, and 25h. The switches 26a, 26b, 26c, 26d, 26e, 26f, 26g, and 26h are, for example, turned on the data f.sub.0, f.sub.1, f.sub.2, f.sub.3, f.sub.4, f.sub.5, f.sub.6, and f.sub.7 are at a high level, that is "1", and turned off when the data is at a low level, that is "0". The current source 22 outputs a current i equivalent to a total summation of the constant currents output from the constant current sources 25a to 25h corresponding to the turned-on switches among the switches 26a to 26h to the oscillation circuit 23. In the current source 22, the constant currents 2I, 4I, 8I, 16I, 32I, 64I, and 128I are defined as powers of 2 of a reference constant current I, therefore the computer 10 generates the control signal S10b of a digital value proportional to the frequency of the horizontal synchronization pulse signal S11.
The oscillation circuit 23 controls the frequency of an oscillation signal output from a built-in voltage-controlled oscillation circuit (VCO) by the current i from the current source 22 and phase-locks the oscillation signal to the horizontal synchronization signal S7a to generate a timing signal. The oscillation circuit 23 generates a horizontal synchronization pulse signal S11 by using a comparison signal S12 corresponding to a fly-back pulse signal from the deflection circuit 12 and the timing signal.
FIG. 16 is a view of the configuration of a deflection circuit 12.
As shown in FIG. 16, the deflection circuit 12 generates a horizontal deflection signal (fly-back pulse) S7a in accordance with the horizontal synchronization pulse signal S11 shown in FIG. 17A at a collector of a transistor Tr.sub.2 and outputs the horizontal deflection signal S7a shown in FIG. 17B to the horizontal deflection coil 9a of the color video display tube 9. At this time, the potential of a terminal 34 of a coil L.sub.3 is controlled by a controller 33 in accordance with the control signal S10a and a peak voltage of the horizontal deflection signal S7a is maintained at a constant regardless of the frequency of the horizontal synchronization pulse signal S11.
Specifically, the controller 33 applies a high level voltage to the terminal 34 of the coil L.sub.3 when the frequency indicated by the control signal S10a is high, and applies a low level voltage to the terminal 34 of the coil L.sub.3 when the frequency indicated by the control signal S10a is low. Namely, in accordance with the change of the frequency of the received television signal, the peak voltage of the horizontal deflection signal S7a generated at the collector of the transistor Tr.sub.2 changes. Accordingly, the potential to be applied to the terminal 34 of the coil L.sub.3 is changed in order to correct the change of the peak voltage of the horizontal deflection signal S7a, therefore the peak voltage of the horizontal deflection signal S7a is maintained constant.
Also, there is known a color television receiver with a point scanning function capable of receiving and displaying a video signal having a synchronization signal of a fixed predetermined frequency.
An AFC circuit in the color television receiver with such a point scanning function, for example, as shown in FIG. 18, has constant current sources 125a to 125f for respectively outputting constant currents I.sub.0 to I.sub.7 for obtaining a horizontal synchronization pulse signal S11 corresponding to eight predetermined fixed frequencies and generates a control signal S21 in which only one out of eight bits becomes a high level. Then, based on the control signal S21, only one switch, which corresponds to a high level bit of the control signal S21 among the switches 126a to 126h, is turned on and outputs a current i from one constant current source among the constant current sources 125a to 125h to the oscillation circuit 23.
When using the AFC circuit shown in FIG. 18, the oscillation circuit 23 and the deflection circuit 12 are designed on the assumption that the current i is not more than a constant current I.sub.7 when the constant current I.sub.7 is the largest among the constant currents I.sub.0 to I.sub.7.
To realize such a point scanning function in the horizontal deflection circuit 7c shown in FIG. 14, it is necessary to generate the current i in the current source 22 in FIG. 15 corresponding to a constant current output from the constant current sources 125a to 125h shown in FIG. 18 in order to obtain the horizontal synchronization pulse signal S11 corresponding to the predetermined fixed frequency. Accordingly, for example, in order to obtain the current i equivalent to the constant current output from the constant current source 125a shown in FIG. 18, the on/off conditions of the switches 26a to 26h shown in FIG. 15 are calculated in the computer 10 and the 8-bit control signal S10b is generated.
However, in the color television receiver with the above multiscanning function of the related art, as shown in FIG. 14, the control signals S10a and S10b from the computer 10 are individually output to the deflection circuit 12 and the AFC circuit 11. Therefore, if the computer 10 runs out of control due to noise, electrical discharge, and the like, the synchronization between the control signals 10a and 10b may be locked out.
In this case, the timing is shifted between a voltage control of the terminal 34 of the coil L.sub.3 by the controller 33 and the horizontal synchronization pulse signal S11 applied to a base of a transistor Tr.sub.1 shown in FIG. 16 to thereby raise the voltage between a collector and a base of the transistor Tr.sub.2 higher than a design threshold. As a result, the transistor Tr.sub.2 may be destroyed.
In the horizontal deflection circuit 7c of the related art, to prevent the breakage of the internal electronic circuits even when the computer 10 runs out of control, a variety of protective circuits are provided. For example, a protective circuit is provided which constantly monitors the horizontal synchronization pulse signal S11 and the potential of the terminal 34 of the coil L.sub.3 and judges whether or not the relationships between the two are maintained normally. When any unusual phenomena arise in the relationships of the two, the protective circuit forcibly supplies a predetermined potential to the base of the transistor Tr.sub.2 and to the terminal 34 of the coil L.sub.3 to avoid breakage.
The installation of such a protective circuit in the horizontal deflection circuit 7c requires analysis of portions of the circuit which can be destroyed when the computer 10 runs out of control at the stage of designing the horizontal deflection circuit 7c. However, such analysis is not easy work. For example, there is a possibility that the installation of the protective circuit may affect the circuit conditions and may cause some portions which originally were safe to be destroyed.
The installation of the protective circuit makes the circuit configuration of the horizontal deflection circuit 7c complicated and large in scale.
Also, as explained above, to realize the point scanning function in the horizontal deflection circuit 7c shown in FIG. 14, it is necessary to calculate the on/off conditions of the switches 26a to 27h shown In FIG. 15 in the computer 10 despite the fact that the synchronization signal of the received television signal is fixed. Thus, the processing becomes complicated.
Further, during the operation of the point scanning function, when an error occurs in calculating the control signal S10a in the computer 10, the circuit may generate a horizontal synchronization pulse signal S11 having an impossible frequency for point scanning. As a result, the deflection circuit can be damaged.
In the point scanning operation, as explained above of the control signal S10b generated in the computer 10, only one out of eight bits becomes a high level in a normal operation, however; when two bits out of eight become high in an abnormal operation, the current value of the current i may exceed the rated value. Consequently, the oscillation circuit 23, the following deflection circuit 12, and other circuits can be destroyed.